Responsibilities

• Design, develop, debug system/IP validation framework to be used in bare-metal and light-weight-rtos environment for SoC validation
• Understand the SoC architecture, new features and prepare test plan
• Develop/port/enhance system validation content based on system level use cases, low power use cases, find HW bugs and root cause them
• Interface with Design/Software teams for test plan and debugs
• Interface with various IP validation team and cross functional teams(Design/SW) for test plan creation and debug complex issues
• Use silicon debug hooks to measure power/performance/coverage and other KPI metrics

Mandatory Skills:

• Good knowledge and understanding of Embedded SW architecture and development in C, C++, Assembly
• C language expertise for low level programming at the hardware-software boundary, assembly language for any processor, C-assembly interworking
• Good knowledge of ARMv8/ARMv9/x86/RISC-V CPU architecture, Interrupt handling, Cache coherency, IO Coherency
• Good knowledge of SoC architecture having Multicore/Multiprocessor with SMP/heterogenous cores
• Knowledge of Operating systems/RTOS/Linux kernel internals, multithreading, scheduling policies/locking mechanism, Virtual memory/MMU/paging etc
• Understanding of memory management, weakly ordered memory model/pipelining of memory systems/memory barriers
• In-depth understanding of software build toolchains comprising of compilers, Makefiles, linker/scatter files
• Compilers/linkers: Proficient in using compilers and linkers such as GCC, CLANG, RVDS, LLVM, Experience in optimizing code and resolving linker issues to ensure efficient and error free builds
• Experience in using JTAG interfaces and tools for debugging HW
• Scripting languages such as Python, shell scripting etc.