Puesto, ciudad o estado.

Hace 2 sem

SW SYS Engineer

Salario no mostrado por compañía.

Empresa confidencial en

Hace 2 sem

SW SYS Engineer

Salario no mostrado por compañía.

Empresa confidencial

Sobre el empleo

Categoría: Ingeniería
Educación mínima requerida: Universitario titulado

Detalles

Contratación:Permanente
Espacio de trabajo:Presencial

Descripción

The position involves understanding of SOC Architecture and DDR Subsystem which includes understanding of DDR Clocking Architecture and PMIC system architecture, and analyzing system SW crash dumps & identifying root cause of stability issues (such as memory corruptions, Memory Lock-ups, Bit flips etc.) reported by different SW groups. The candidate would have opportunity to interact with multiple SW & HW teams to understand DDR System Architecture & follow-up on the issues for the DDR defects found. Apart from getting to understand and debug system level issues, this position is expected to give an exposure to understand various quality stages from product development to commercial launch of the product. The candidate is also expected to work on the DDR and CPUSS specific tools developed by the team to catch issues in HW and SW.


Minimum Qualifications


2+ years of industry experience in the following:

  • Device drivers
  • Embedded software development in C, C++ and/or assembly
  • JTAG, logic analyzers and Oscilloscopes for on-chip debugging

Preferred Qualifications

  • Previous experience in platform bring-up (pre-silicon/post-silicon)
  • Knowledge in scripting languages (e.g., Perl, Python, etc.)
  • Good understanding of real-time operating systems.
  • Familiarity with boot loader functionality is a plus
  • Excellent critical thinker with sharp debugging skills
  • Interact closely with cross-functional software teams to verify and debug software stability issues and features
  • Engage with HW and VI team to identify potential HW bugs
  • Engage in pre-silicon bring-up on simulation/emulation platforms
  • Participate in silicon-on dock bring-up activities in the lab
  • Debug issues reported in DDR and CPUSS area
  • Define and develop test cases to catch DDRSS and CPUSS specific issues
  • Excellent communication and collaborative skills

Educational Requirements

Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering

ID: 18397727