Hace 2 sem
SW SYS Engineer
Salario no mostrado por compañía.
Hace 2 sem
SW SYS Engineer
Salario no mostrado por compañía.
Empresa confidencial
en
Sobre el empleo
Detalles
Descripción
The position involves understanding of SOC Architecture and DDR Subsystem which includes understanding of DDR Clocking Architecture and PMIC system architecture, and analyzing system SW crash dumps & identifying root cause of stability issues (such as memory corruptions, Memory Lock-ups, Bit flips etc.) reported by different SW groups. The candidate would have opportunity to interact with multiple SW & HW teams to understand DDR System Architecture & follow-up on the issues for the DDR defects found. Apart from getting to understand and debug system level issues, this position is expected to give an exposure to understand various quality stages from product development to commercial launch of the product. The candidate is also expected to work on the DDR and CPUSS specific tools developed by the team to catch issues in HW and SW.
Minimum Qualifications
2+ years of industry experience in the following:
Preferred Qualifications
Educational Requirements
Required: Bachelor's, Computer Engineering and/or Computer Science and/or Electrical Engineering Preferred: Master's, Computer Engineering and/or Computer Science and/or Electrical Engineering
ID: 18397727